Improving power efficiency of the radio frequency amplifier circuit is directly linked to reducing power consumption of a device, and is a very important characteristic. In a high output amplifier circuit, in addition to high power consumption of a device, low efficiency converts inputted power into heat, which causes designing of heat release to be more difficult and decreases reliability of the device.
Conventionally, as a method for causing the radio frequency amplifier circuit to operate with high efficiency, a class F circuit and an inverse class F circuit have been generally used, and mechanisms of these high efficiency circuits have become publicly known. In short, in the amplifier circuit, the efficiency decreases because of an increase in power loss, and what is needed for avoiding the increase in power loss is to adjust a voltage/current waveform at an output, thereby forming an optimal waveform. Specifically, it is required to reduce an area in which the voltage waveform and the current waveform overlap. For example, when a transistor used for the amplifier circuit is biased to a class B operation, only a fundamental and an even harmonic are included in the output current waveform. Therefore, to eliminate the overlap, it is sufficient to set only the fundamental and an odd harmonic as the output voltage waveform. For this, by causing the even harmonic to be in a shorted state and the odd harmonic to be in an open state for an output of the transistor, theoretically, the efficiency reaches 100%. This is the class F circuit. Conversely, a case where the even harmonic is in the open state and the odd harmonic is in the shorted state is the inverse class F circuit, and these circuits are selectively used depending on an on-resistance, a bias condition, and the like of the transistor to be used.
A high-efficiency radio frequency amplifier circuit using the conventional class F circuit is disclosed in PTL 1.
FIG. 4A shows an analogous circuit showing a configuration of the conventional radio frequency amplifier circuit.
As shown in FIG. 4A, this radio frequency amplifier circuit includes a transistor 401, a first inductor 402A including a lumped parameter element, a capacitor 402B, fundamental matching inductors 404A and 404B, and a fundamental matching capacitor 404C. In the circuit, a secondary harmonic processing circuit 402 including the first inductor 402A and the capacitor 402B is connected to an output terminal of the transistor 401 in parallel, the fundamental matching inductors 404A and 404B are connected to the output terminal of the transistor 401 in series, and the fundamental matching capacitor 404C is connected between the fundamental matching inductors 404A and 404B in parallel. The above circuit structure performs a secondary harmonic processing and improves the efficiency. That is, by setting the first inductor 402A and the capacitor 402B such that the secondary harmonic processing circuit 402, as a series resonance circuit, resonates at a frequency twice as high as the fundamental, impedance for the secondary harmonic becomes 0 and the shorted state in the secondary harmonic for the output terminal of the transistor 401 is achieved. Furthermore, a fundamental matching circuit 404, including the fundamental matching inductors 404A and 404B and the fundamental matching capacitor 404C, is connected to the transistor 401.
FIG. 4B shows a layout of the radio frequency amplifier circuit in FIG. 4A.
As shown in FIG. 4B, the output terminal (drain terminal) 401A of the transistor 401 and the capacitor 402B are connected through a wire which is the first inductor 402A included in the secondary harmonic processing circuit 402. Meanwhile, the output terminal 401A of the transistor 401 and the fundamental matching capacitor 404C are connected through a wire which is the fundamental matching inductor 404A included in the fundamental matching circuit 404. Furthermore, to connect the output terminal 401A of the transistor 401 to an external circuit 406, a wire which is the inductor 404B is formed. Here, the capacitor 402B and the fundamental matching capacitor 404C are pattern-formed on a dielectric substrate 405.
Moreover, PTL 2 discloses a radio frequency amplifier circuit capable of processing an even higher-order harmonic, as shown in FIG. 5.
In this radio frequency amplifier circuit, when a wavelength of the fundamental is set to λ, a distributed parameter element having a line length of λ/4 is connected to an output of a transistor 501, and a distributed parameter element group 502 is connected to this distributed parameter element in parallel. Each of the distributed parameter element group 502 includes harmonic processing circuits 502A, each of which includes a distributed parameter element and distributed parameter elements 502B. The harmonic processing circuit 502A has a line length of λ/8 in the secondary harmonic, λ/12 in a tertiary harmonic, and λ/4n in an n-th ordered harmonic. Therefore, these harmonic processing circuits 502A are in the shorted state for a point A in the drawing in each harmonic, and the line of the λ/4 is tip shorted. Consequently, the harmonic processing circuit 502A is in the shorted state in the even harmonic while being in the open state in the odd harmonic and a class F operation is achieved. Furthermore, by the harmonic processing circuit 502A and the distributed parameter element 502B being set to have a total line lengths of λ/2, admittance in each of the harmonic processing circuit 502A for the fundamental becomes 0, whereby power loss in the fundamental becomes 0. Furthermore, PTL 3 discloses an example of the harmonic processing circuit including the lumped parameter element instead of the distributed parameter element, with the same mechanism as shown in FIG. 5. This enables not only to perform processing of a higher order harmonic, but also to miniaturize the harmonic processing circuit by using the lumped parameter element.